Since the development of integrated circuit technology, computers and computer storage devices have been made from wafers of semiconductor material comprising a plurality of integrated circuits. After a wafer is made, the circuits are typically separated from each other by dicing the wafer into individual chips. Thereafter, the individual chips are bonded to carriers of various types, interconnected by wires and packaged. Such "two dimensional" packages of chips fail to optimize the number of circuits that may be fabricated in a given space, and also introduce undesirable signal delays, capacitance, and inductance as signals travel between chips. Recently, three-dimensional stacks of single chips have emerged as an important packaging approach. A typical multi-chip electronic module consists of multiple individual integrated circuit chips adhesively secured together as a monolithic structure (a "stack") extending in one direction as a single row or column. A metallization pattern is often provided directly on one (or more) side surface(s) of the module for chip interconnection and for electrical connection of chips to circuitry external to the module. Metallization patterns can include both individual contacts, and bussed contacts.
Volume production of electronic modules formed of stacks of individual integrated circuit chips has been limited by the high production costs associated therewith. The individual steps of dicing, stacking, and applying metallization are all relatively complex and expensive process steps in the formation of a monolithic electronic module. Furthermore, the overall level of circuit integration and density in an electronic module is necessarily limited in a stack of single integrated circuit chips extending in one-direction as a row or column.